Image sensor with correlated double sampling technique using...

H - Electricity – 04 – N

Patent

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H04N 3/15 (2006.01) H04N 5/335 (2006.01)

Patent

CA 2350416

The invention is directed to a method and apparatus for processing an output signal of an image sensor pixel in a manner that will substantially avoid fixed pattern noise contributed by the readout circuitry. The method comprises applying a reference voltage VREF to first and second capacitor elements that are coupled together at a common terminal, applying a first sample signal VS1 from the image sensor pixel to the first capacitor element placing a charge on it, transferring the charge from the first capacitor element to the second capacitor element, applying a second sample signal Vs2 from the image sensor pixel to the first capacitor element placing a charge on it, and transferring the charge from the second capacitor element to the first capacitor element so as to provide an output signal that is a function of the difference between the second sample signal Vs2 and the first sample signal Vs1. In particular Vo = Vs2 - Vs1 + VREF. The readout circuitry comprises a first capacitor element having first and second terminals, a second capacitor element having first and second terminals, an amplifier having an input terminal and an output terminal with the input terminal connected to the second terminals of the first and second capacitor elements. The readout circuitry further includes a first switch adapted to be connected between a reference voltage and the first terminal of the first capacitor element, a second switch adapted to be connected between a pixel and the first terminal of the first capacitor element, a third switch adapted to be connected between a reference voltage and the first terminal of the second capacitor element, a fourth switch connected between the amplifier input terminal and the output terminal, a fifth switch connected between the second terminal of the second capacitor element and the amplifier output terminal, and a sixth switch connected between the first terminal of the first capacitor element and the amplifier output terminal. The readout circuitry also includes a controller for controlling the first to sixth switches. The amplifier may be a CMOS operational amplifier with a reference terminal for connection to a reference voltage and all of the switches may be CMOS transistors.

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