Implementation of orthogonal narrowband channels in a...

H - Electricity – 04 – J

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H04J 1/08 (2006.01) H04J 11/00 (2006.01) H04L 5/06 (2006.01) H04Q 7/20 (2006.01)

Patent

CA 2307907

An innovative channelizer design methodology is provided to adjust the narrowband channel frequency spacing and processing algorithm in order to develop a configurable multi-rate channelizer (20) for multiple applications with different input data rates and input channel group bandwidths. Given an input and output sampling rate and the input channel group bandwidth, the input channel spacing, the discrete Fourier transform (DFT) size, the valid output DFT bins, the dead zone implementation including the number of samples to blank for each chip, which exact samples to blank, the timing error immunity versus performance degradation balance may be derived to design hardware implementation of a configurable multi-rate channelizer for use in applications with different input data rates and input channel group bandwidths. Using the innovative multi-rate channelizer design, a single configurable channelizer may be obtained and can be usable for multiple applications in different channelization modes of operation while realizing design gate savings.

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