H - Electricity – 03 – K
Patent
H - Electricity
03
K
H03K 19/177 (2006.01) G06F 17/50 (2006.01) H03K 19/173 (2006.01)
Patent
CA 2147363
A field programmable gate array (FPGA) of cells (12) arranged in rows and co- lumns is interconnected by a hierarchical rout- ing structure. Switches (18, 20) separate the cells (12) into blocks and blocks of blocks with routing lines (26, 28, 30, 32, 34, 36, 38, 40) in- terconnecting the switches (18, 20) to form the hierarchy.
Smart & Biggar
Xilinx Inc.
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