Improved patching methods and apparatus for fabricating...

G - Physics – 11 – C

Patent

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Details

G11C 11/34 (2006.01) G11C 29/02 (2006.01) H01L 21/66 (2006.01) H01L 23/00 (2006.01) H05K 13/00 (2006.01) H05K 1/18 (2006.01) H05K 3/22 (2006.01)

Patent

CA 2477766

A method and apparatus for building a memory module using improved patching schemes comprises, mounting multiple primary and secondary memory parts on a mufti-layer circuit board, positioning I/O bit line patching networks adjacent to the primary and secondary memory parts, matching read/write control signals for primary and secondary memory parts which share I/O bit line patching networks, testing primary and secondary memory parts to identify non-operable I/O lines, and patching any non-operable I/O line of a primary memory part by replacing it with a fully operable I/O line of its associated backup memory part. The method and apparatus include mufti-layer circuit boards which utilize 2-to~ 1, 4-to-1, and 8-to-1 patching configurations.

L'invention concerne un procédé et un dispositif destinés à construire un module de mémoire à l'aide de systèmes de correction améliorés. Le procédé consiste à monter une pluralité de parties de mémoire principales et secondaires sur une carte de circuit imprimé multicouche, à positionner des réseaux de correction de lignes de bits d'entrée/sortie au voisinage des parties de mémoire principales et secondaires, à mettre en correspondance des signaux de commande de lecture/écriture pour les parties de mémoire principales et secondaires partageant les réseaux de correction de lignes de bits d'entrée/sortie, à tester les parties de mémoire principales et secondaires en vue d'identifier des lignes d'entrée/sortie non exploitables, puis à corriger toute ligne d'entrée/sortie non exploitable d'une partie de mémoire principale par remplacement de cette ligne par une ligne d'entrée/sortie entièrement exploitable d'une partie de mémoire de secours associée. Ce procédé et ce dispositif font appel à des cartes de circuit imprimé multicouches utilisant des structures de correction 2-1, 4-1 et 8-1.

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