Improved structure for cdse tft

H - Electricity – 01 – L

Patent

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Details

H01L 29/786 (2006.01) G02F 1/1335 (2006.01) G02F 1/136 (2006.01) G09F 9/35 (2006.01) H01L 29/417 (2006.01)

Patent

CA 2150679

A thin film transistor, comprising: a glass substrate; a gate electrode deposited on the substrate; a gate insulator layer deposited on the substrate so as to overly the gate electrode; a thin film semiconductor channel layer deposited on the gate insulator layer and substantially aligned with the gate electrode; a passivation layer deposited on the gate insulator layer so as to overly the thin film semiconductor channel layer; a pair of via holes etched though the passivation layer to the semiconductor channel layer; and a pair of source and drain electrodes deposited on the passivation layer and extending through the via holes for contacting the semiconductor channel layer.

Transistor à couches minces comportant un substrat en verre; une électrode de grille déposée sur le substrat; une couche d'isolant de grille déposée sur le substrat et par-dessus l'électrode de grille; une couche canal semi-conductrice en couche mince déposée sur la couche d'isolant de grille et sensiblement alignée sur l'électrode de grille; une couche de passivation déposée sur la couche d'isolant de grille et par-dessus la couche canal semi-conductrice en couche mince; une paire de trous traversants formés par gravure dans la couche de passivation et s'étendant jusqu'à la couche canal semi-conductrice; et une paire d'électrodes source et drain déposées sur la couche de passivation et s'étendant dans les trous traversants de manière qu'elles soient au contact de la couche canal semi-conductrice.

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