Improvements in or relating to modifying a digital bitstream

H - Electricity – 03 – M

Patent

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Details

H03M 7/00 (2006.01) H04N 7/12 (2006.01) H04N 7/24 (2006.01) H04N 7/32 (2006.01) H04N 7/52 (2006.01)

Patent

CA 2234010

This invention relates to improvements in controlling the decoder buffer occupancy, particularly in relation to, but not exclusively to, switching between compressed bitstreams. This invention provides a method of modifying a digital bitstream 11 to be transmitted through a decoder 14 having a buffer 15. An expected level of buffer occupancy is determined for a point in the digital bitstream 11 and the digital bitstream 11 is modified at that point to change the buffer occupancy toa second level. The second level may be determined from a second digital bitstream 12. One advantage of this method is that the occupancy of the buffer 15 can be adjusted to match the buffer requirements of the second bitstream 12 before switching to the second bitstream 12. The invention provides method and apparatus for improving the decoder buffer management during switching between bitstreams.

L'invention porte sur les améliorations pour contrôler l'occupation de la mémoire tampon du décodeur, plus particulièrement en relation avec la commutation entre les trains binaires comprimés, mais non exclusivement avec cette dernière. L'invention divulgue une méthode de modification d'un train binaire 11 à transmettre au moyen d'un décodeur 14 comprenant une mémoire tampon 15. Un niveau attendu d'occupation de la mémoire tampon est déterminé pour un point dans le train binaire 11. Puis, ce dernier 11 est modifié à ce point pour changer l'occupation de la mémoire tampon à un second niveau. Ce dernier peut être établi à partir d'un second train binaire 12. Un des avantages de cette méthode réside dans le fait que l'occupation de la mémoire tampon 15 peut être réglée pour satisfaire aux exigences de la mémoire tampon du second train binaire 12 avant de commuter à ce dernier 12. L'invention porte sur la méthode et l'appareil d'amélioration de la gestion de la mémoire tampon du décodeur pendant la commutation entre les trains binaires.

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