Improving memory layout based on connectivity considerations

Details Improving memory layout based on connectivity considerations Improving memory layout based on connectivity considerations

G - Physics

06

F

G06F 9/45 (2006.01)

Patent

CA 2166254

A technique used during interprocedural compilation in which program objects are grouped together based on the weights of the connections between the objects and their costs. System-imposed constraints on memory size can be taken into account to avoid creating groupings that overload the system's capacity. The groupings can be distributed over memories located on different processors.

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