Independent asynchronous boot block for synchronous...

G - Physics – 11 – C

Patent

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G11C 7/10 (2006.01) G11C 7/20 (2006.01) G11C 16/08 (2006.01) G11C 16/32 (2006.01)

Patent

CA 2441898

A non-volatile memory device (20) having a main memory (23) that operates synchronously with the system clock and an asynchronous boot block (25). The boot block (25) can be activated to operate asynchronously upon initial power up or can be switched from synchronous to asynchronous mode upon receipt of a command signal by control logic circuitry within the device.

L'invention concerne un dispositif à mémoire rémanente (20) comportant une mémoire (23) qui fonctionne de manière synchrone avec le système d'horloge, ainsi qu'un bloc d'amorçage asynchrone (25). Le bloc d'amorçage (25) peut être activé pour fonctionner de manière asynchrone au moment de la mise sous tension initiale, ou passer d'un mode synchrone à un mode asynchrone lorsqu'il reçoit un signal de commande des circuits logiques intégrés dans la commande du dispositif.

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