Initial phase-loading circuit for a fractionally-spaced...

H - Electricity – 04 – L

Patent

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Details

H04L 27/01 (2006.01)

Patent

CA 2156001

Briefly, in accordance with one embodiment of the invention, an initial phase-loading circuit (IPLC) for a fractionally-spaced linear equalizer (FSLE) comprises: a signal coupling component adapted to be coupled to the FSLE; the signal coupling component being adapted to be coupled to the FSLE in a configuration so as to selectively introduce time-shifted discrete signals. Briefly, in accordance with another embodiment of the invention, a method of initializing a FSLE comprises the steps of: providing a discrete signal to the FSLE, the FSLE including a set of initial filter tap coefficients; performing discrete signal equalization using the FSLE at least until substantial convergence of the filter tap coefficients; and providing to the FSLE a time-shifted discrete signal to replace the previously provided discrete signal, the FSLE, the FSLE including the set of initial filter tap coefficients.

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