G - Physics – 06 – F
Patent
G - Physics
06
F
354/246
G06F 9/40 (2006.01) G06F 11/22 (2006.01) G06F 12/08 (2006.01) F02B 75/02 (2006.01)
Patent
CA 1129113
ABSTRACT A data processing system includes a plurality of system units all connected in common to a systems bus. The system units include a central processor (CPU), a memory system and a high speed buffer or cache system. During the overall system initialization process, apparatus in cache effects the transfer of information from main memory to cache to load all address locations of cache. The transfer of information from main memory to cache starts from the lowest order address in main memory and continues from successive address locations until the cache is full. -2-
318114
Joyce Thomas F.
Panepinto William
Honeywell Information Systems Inc.
Smart & Biggar
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