Input/output continuity test mode circuit

G - Physics – 01 – R

Patent

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G01R 31/3185 (2006.01)

Patent

CA 2432889

A continuity test mode circuit (20) in an integrated circuit device having a means for switching (28) between a continuity test mode and a normal operating mode. The test mode is characterized by one or more input pins (22) being in direct electrical connection with one or more output pins (32) to enable the pins and the chip packaging and chip socket and circuit board to be tested for continuity. In normal operating mode, the opearation of the chip is not affected by the test mode circuitry. The continuity test mode circuit allows for testing of device-socket and/or device-board continuity in order to ensure accurate testing and programming of the device.

L'invention concerne un circuit (20) en mode de test de continuité dans un dispositif de circuit intégré ayant un moyen de commuter (28) entre un mode de test de continuité et un mode d'exploitation normal. Le mode de test se caractérise par au moins une broche d'entrée (22) en connexion électrique directe avec au moins une broche de sortie (32), ce qui permet de tester en continuité les broches, la mise sous boîtier de puces, les supports de puces et la carte de circuit imprimé. En mode d'exploitation normal, le fonctionnement de la puce n'est pas affecté par les circuits du mode de test. Le mode de test de continuité permet de tester la continuité dispositif-support et/ou dispositif-carte afin d'assurer la précision du test et de la programmation dudit dispositif.

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