Inslated gate field effect transistor

Details Inslated gate field effect transistor Inslated gate field effect transistor

H - Electricity

01

L

356/74

H01L 27/02 (2006.01) H01L 29/06 (2006.01) H01L 29/10 (2006.01) H01L 29/78 (2006.01)

Patent

CA 1083262

ABSTRACT OF THE DISCLOSURE An insulated gate field effect transistor is formed of a drain region of a first conductivity type which faces both of the major surfaces of a semiconductor substrate, a frame region of a second conductivity type which faces the one major surface of the semiconductor substrate, a base region of the second conductivity type which faces the one major surface and is connected to the frame region, a PN junction being formed between the base region and the drain region, and a source region of the first conduct- ivity type which faces the one major surface and is formed in the base region as if being surrounded thereby. The insulated gate field effect transistor is also pro- vided with a source electrode which short-circuits the frame re- gion and the source region, a drain electrode which is provided on the drain region facing the other major surface of the sub- strate, and a gate electrode which is provided on the base region facing the one major surface through a gate insulating layer. -1-

276873

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