Instruction for multithreaded parallel processor

G - Physics – 06 – F

Patent

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Details

G06F 9/00 (2006.01) G06F 9/30 (2006.01) G06F 9/312 (2006.01) G06F 9/315 (2006.01) G06F 9/32 (2006.01) G06F 9/38 (2006.01)

Patent

CA 2383531

A parallel hardware-based multithreaded processor is described. The processor includes a general purpose processor that coordinates system functions and a plurality of microengines that support multiple hardware threads or contexts (CONTEXT). The processor also includes a memory control system that has a first memory controller that sorts memory references based on whether the memory references are directed to an even bank or an odd bank of memory and a second memory controller that optimizes memory references based upon whether the memory references are read references or write references. Instructions for switching and branching based on executing contexts (Context Descriptors) are also disclosed.

L'invention concerne un processeur de mutliprocessus parallèle. Le processeur comprend un processeur universel qui coordonne des fonctions du système et plusieurs micromoteurs qui supportent plusieurs threads de matériel ou contextes (CONTEXT). Le processeur peut également comporter un système de contrôle de mémoire ayant d'une part un premier contrôleur d'accès de mémoire qui trie des références de mémoire selon que lesdites références sont envoyées à une banque paire ou une banque impaire de mémoire, et d'autre part un second contrôleur d'accès de mémoire qui optimise lesdites références selon qu'elles sont des références de lecture ou d'écriture. Cette invention concerne également des instructions de commutation et de branchement reposant sur l'exécution de contextes (descripteurs de contextes).

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