H - Electricity – 04 – L
Patent
H - Electricity
04
L
340/82
H04L 5/14 (2006.01) G06F 13/40 (2006.01) G06F 13/42 (2006.01)
Patent
CA 1212739
ABSTRACT OF THE DISCLOSURE A monolithically integratable transmission system for binary information has at least one address source which is connected to at least one address sink via an address bus. The address sink is respectively allocated to a register means con- nected to a data bus. A clock generator generates a first clock signal and a non-overlapping, phase-shifted second clock signal. The address bus and the data bus are precharged during the first clock signal and access of an addressed register means to the data bus occurs during the second clock signal. In the time span between the two clock signals, the address bus is charged with the address signals by discharging.
455416
Geiger Gerhard
Strafner Michael
Aktiengesellschaft Siemens
Fetherstonhaugh & Co.
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