Integrated architecture for the unified processing of visual...

H - Electricity – 04 – L

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H04L 9/32 (2006.01)

Patent

CA 2593247

The present invention is directed toward a system on chip architecture having scalable, distributed processing and memory capabilities through a plurality of processing layers. One application of the present invention is in a novel media processing device, designed to enable the processing and communication of video and graphics using a single integrated processing chip for all visual media.

L'invention concerne une architecture sur puce de système comprenant des capacités de traitement et de mémoire échelonnables et distribuées dans une pluralité de couches de traitement. Une telle architecture peut être appliquée, par exemple, dans un dispositif de traitement de médias conçu pour permettre de traiter et de communiquer des vidéos et des éléments graphiques au moyen d'une puce de traitement unique intégrée pour tous les médias visuels.

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