Integrated circuit arrangement in mos- technology with field...

Details Integrated circuit arrangement in mos- technology with field... Integrated circuit arrangement in mos- technology with field...

H - Electricity

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356/188

H01L 21/66 (2006.01) G01R 31/28 (2006.01) G06F 11/267 (2006.01)

Patent

CA 1138125

1 PHD. 79-011. ABSTRACT: During the fabrication of integrated cir- cuits testing is necessary in order to enable faults to be located. For this purpose it is known to connect test points to specific points of the circuit, which dur- ing fabrication are accessible with a suitable designed scanner. Owing to the location of the test points smaller blocks are formed in comparison with the complete circuit arrangement. According to the invention transistor switched are included to provide isolation of selected in- put and output transistor blocks to allow separate testing as well as testing in combination.

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