Integrated circuit chip package

Details Integrated circuit chip package Integrated circuit chip package

H - Electricity

01

L

356/146

H01L 23/50 (2006.01) H01L 21/60 (2006.01) H01L 23/14 (2006.01) H01L 23/31 (2006.01) H01L 23/538 (2006.01)

Patent

CA 1226966

INTEGRATED CIRCUIT CHIP PACKAGE Abstract of the Disclosure An integrated circuit is mounted on, and electrically connected to an underlying substrate by the flip-chip technique. In this technique, the chip is inverted and bonding pads on the chip are soldered to correspondingly located bonding pads on the substrate. By the invention a continuous ribbon or loop of solder or polymer extends between the chip and substrate surfaces and defines a sealed cavity. Because the interior of the cavity is sealed from contaminants, conducting leads of the chip or substrate can be left uncovered within the cavity so reducing the capacitance of high frequency circuits. The substrate can be a connection medium such as a printed circuit board or could be another integrated circuit chip. -i-

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