G - Physics – 11 – C
Patent
G - Physics
11
C
328/186
G11C 5/00 (2006.01) G05F 1/62 (2006.01) G05F 5/00 (2006.01) G11C 5/14 (2006.01) G11C 8/08 (2006.01) H02M 3/07 (2006.01)
Patent
CA 1230389
- 9 - INTEGRATED CIRCUIT HAVING A VARIABLY BOOSTED NODE Abstract An integrated circuit comprises a node that is boosted by one or more boost capacitors depending on the level of the power supply voltage. When the level is below a given threshold, a first boost capacitor is activated. Additional boost capacitors may be provided for activation at still lower thresholds. The boost capacitors are deactivated when the power supply level exceeds the corresponding thresholds. In this manner, a more constant boosted voltage is obtained. This provides for an adequate boosted voltage at low power supply levels, while avoiding excessive boost at high power supply voltages that could damage devices. The technique may be used for boosted row conductors in dynamic random access memories, among other applications.
501283
Kirsch Howard C.
Stefany James H.
American Telephone And Telegraph Company
Kirby Eades Gale Baker
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