Integrated circuit manufacturing process

Details Integrated circuit manufacturing process Integrated circuit manufacturing process

G - Physics

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G03C 5/00 (2006.01) H01L 21/02 (2006.01) H01L 21/306 (2006.01) H01L 21/311 (2006.01) H01L 21/316 (2006.01) H01L 21/321 (2006.01) H01L 21/762 (2006.01)

Patent

CA 1264870

INTEGRATED CIRCUIT MANUFACTURING PROCESS ABSTRACT OF THE DISCLOSURE A process is disclosed for manufacturing an integrated circuit in which multiple patterned layers of thin film materials are provided on a silicon wafer. The wafer is conditioned between the providing of layers, after each etching step, by rinsing the item with R purified water solution containing at least .01 ppm ozone, preferably between .02 and .09 ppm ozone . -1-

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