Integrated circuit solder die-attach design and method

Details Integrated circuit solder die-attach design and method Integrated circuit solder die-attach design and method

H - Electricity

01

L

356/134

H01L 21/70 (2006.01) H01L 23/48 (2006.01) H01L 23/66 (2006.01) H01L 27/02 (2006.01)

Patent

CA 2032266

INTEGRATED CIRCUIT SOLDER DIE-ATTACH DESIGN AND METHOD ABSTRACT OF THE DISCLOSURE An improved semiconductor device adapted to be metallurgically bonded to a substrate is disclosed. In particular, monolithic microwave integrated circuit (MMIC) device (10) includes a semiconductor wafer (12) having first and second major surfaces and defining at least one via (34) extending therethrough. An electrical circuit is disposed on the first surface of semiconductor wafer (12). In accordance with this invention, MMIC device (10) includes a ground-plane metallization system (32) provided on the second surface of the semiconductor wafer (12). Backside metallization system (32) promotes preferential "de-wetting" of solder within vias (34) to reduce solder failures associated with die-attach processing. Backside metallization systems (32) includes a ground-plane layer (36) and a second layer (38) fabricated from a non-wettable material which is deposited within via (34). Third layer (42) is deposited on second layer (36) but terminates adjacent a peripheral edge of via (34). Third layer (42) promotes wetting outside via (34) during solder die-attach processing.

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