Integrated circuit system for analog signal storing and...

G - Physics – 11 – C

Patent

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G11C 11/34 (2006.01) G11C 11/56 (2006.01) G11C 27/00 (2006.01)

Patent

CA 2176010

An integrated circuit which operates to store an input analog signal within an analog storage device such as an EEPROM (108) is disclosed. Initially, a target voltage is determined for applying to the memory cell with the target voltage set to about 90 % of the input analog signal voltage. A high voltage ramp (112) is applied to the memory cell to set the voltage of the cell to the target voltage. A read operation is simultaneously performed while the high voltage ramp is applied to detect the voltage stored on the cell and to terminate the application of the high voltage ramp once the target voltage is reached (104). Thereafter, a normal read operation is performed on the memory cell to detect the actual voltage of the cell. The "read-while writing" operations are performed a predetermined number of times to achieve programming of the cell.

Circuit intégré permettant de stocker un signal analogique d'entrée dans un dispositif de stockage analogique tel qu'une mémoire EEPROM (108). Une tension cible est tout d'abord déterminée pour être appliquée à la cellule de mémoire, ladite tension cible étant réglée à environ 90 % de la tension du signal analogique d'entrée. Une rampe de tension élevée (112) est appliquée à la cellule de mémoire afin de régler la tension de cette cellule à la tension cible. Une opération de lecture est effectuée simultanément, tandis que la rampe de tension élevée est appliquée, pour détecter la tension de la cellule et interrompre l'application de cette rampe une fois que la tension cible est atteinte (104). Une opération de lecture normale est ensuite effectuée sur la cellule de mémoire pour détecter la tension réelle de la cellule. Ces opérations de lecture et d'écriture simultanées sont effectuées un nombre de fois prédéterminé pour programmer la cellule.

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