H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/73
H01L 29/78 (2006.01) H01L 27/088 (2006.01) H01L 29/10 (2006.01) H01L 29/772 (2006.01)
Patent
CA 1091815
ABSTRACT OF THE DISCLOSURE The invention provides an integrated circuit using an insulated gate field effect transistor of the punch-through type. The insulated gate field effect transistor is formed in a semi-conductor substrate of a predetermined conductivity type and has a source electrode, a gate electrode, and a drain electrode. The source and drain electrodes are lo- cated in different regions of the surface of the substrate, and the gate electrode is located on a gate insulating layer formed on the semiconductor substrate between the source and drain electrodes. The impurity concentration in the semiconductor substrate, the channel length between the source and drain electrodes, and the thickness of the gate insulating layer are selected so that the insulated, gate field effect transistor is rendered non-conductive in the absence of a gate voltage applied to the gate electrode, and the effect transistor is rendered conductive due to the punch through effect between the source and drain, electrodes when a gate voltage of a predetermined polarity is applied to the gate electrode. This invention is par- ticularly useful for an integrated circuit in which a high speed operation is required, and overcomes difficulties previously encountered with the punch-through type effect transistor in that it provides an integrated circuit having a high operation speed, uses an insulated gate field effect transistor of punch-through type having a normally-off characteristic, and it provides integrated logical circuits for electronic computations.
291234
Nakamura Tetsuo
Shinoda Masaichi
Yamamoto Minoru
Fujitsu Limited
Mcfadden Fincham
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