Integrated circuit with adaptive speed binning

Details Integrated circuit with adaptive speed binning Integrated circuit with adaptive speed binning

G - Physics

06

F

G06F 1/08 (2006.01)

Patent

CA 2586445

Systems and techniques are disclosed relating to adapting the frequency of an electronic device comprising an integrated circuit and an electronic component to improve performance. The integrated circuit determines a set of frequency plans, each corresponding to a distribution of delay range highest passing values and one of a set of frequencies at which the electronic device can operate. Based on communication with the electronic component, the integrated circuit implements a preferred frequency plan.

L'invention concerne des système et des procédés permettant l'adaptation de la fréquence d'un dispositif électronique comprenant un circuit intégré et un composant électronique, de manière à améliorer la performance de celui-ci. Le circuit intégré détermine un ensemble de plans fréquentiels (FP), correspondant chacun à une distribution des valeurs acceptables les plus élevées (HPV) d'un intervalle de retard, et une fréquence faisant partie d'une ensemble de fréquences auxquelles de dispositif électronique peut fonctionner. Le circuit intégré communique avec le composant électronique et applique un plan de fréquence préféré en fonction de cette communication.

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