Integrated data clock extractor

H - Electricity – 04 – L

Patent

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Details

H04L 7/027 (2006.01) H03L 7/081 (2006.01) H03L 7/085 (2006.01) H04L 7/033 (2006.01)

Patent

CA 2338320

A circuit for generating a data clock signal from input timing information. The circuit incorporates a cycle limit extractor in order to correct data error in the phase corrected output resulting from circuit counter rollover.

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