G - Physics – 06 – F
Patent
G - Physics
06
F
354/192
G06F 7/52 (2006.01) G06F 7/50 (2006.01) H01L 29/732 (2006.01)
Patent
CA 1110773
TITLE OF THE INVENTION INTEGRATED DIGITAL MULTIPLIER CIRCUIT USING CURRENT MODE LOGIC ABSTRACT OF THE DISCLOSURE A parallel digital multiplier circuit fabricated in accordance with an advanced triple diffusion process providing feature geometry down to a minimum of two microns and junction depths of less than two microns, wherein a high packing density provided by the fabrication process is utilized to full advantage by the use of current mode logic, which requires relatively few and relatively small resistors, uses only inherently faster NPN transistors, employs a relatively small voltage swing between logic levels, has unlimited cascading capability, and provides a superior speed-power product. -1-
330816
Gowling Lafleur Henderson Llp
Trw Inc.
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