Integrated floating point processor and central microprocessor

G - Physics – 06 – F

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354/233

G06F 13/00 (2006.01) G06F 7/00 (2006.01)

Patent

CA 1153123

INTEGRATED FLOATING POINT PROCESSOR AND CENTRAL MICROPROCESSOR ABSTRACT OF THE DISCLOSURE There is described a new and unique apparatus for performing floating point processor (FPP) operations in conjunction with a central processor unit (CPU). The new apparatus and method permits micro-level interfacing of the FPP with the CPU or other similar components. The new apparatus allows most FPP computations to be accomplished substantially in parallel with and independent of other CPU operations whereby the FPP is not limitative of the system operating speed. The invention utilizes simplified FPP hardware interconnected at a lower level in the architectural scheme of a CPU so that the CPU performs many of the control functions related to the FPP operations.

359086

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