Integrated logic buffer circuit

Details Integrated logic buffer circuit Integrated logic buffer circuit

H - Electricity

03

K

328/127, 328/128

H03K 19/017 (2006.01) H03K 19/003 (2006.01) H03K 19/0944 (2006.01)

Patent

CA 1241387

9 ABSTRACT: Integrated logic buffer circuit. Integrated logic circuit comprising a pushpull amplifier stage, in which by means of a bootstrap circuit the potential at the gate of the "push" transistor is brought above the supply voltage so that the output voltage of the amplifier lies above the supply voltage minus the threshold voltage of the said transistor. In order to prevent the charge from leaking away after the bootstrap capacitance has been charged via an enhancement transistor, the enhancement transistor is cut off by means of the "low" input signal. A second bootstrap circuit (between the input and the gate of the enhancement transistor) ensures that the first bootstrap capacitance is charged up to the full supply voltage because the latter gate electrode is lifted above the supply voltage by the second bootstrap.

474307

Affiliated with

Also associated with

Rating

Integrated logic buffer circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated logic buffer circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated logic buffer circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1286655