Integrated matrix display circuitry

Details Integrated matrix display circuitry Integrated matrix display circuitry

G - Physics

09

G

375/53

G09G 3/20 (2006.01) G09G 3/36 (2006.01) H04N 3/10 (2006.01)

Patent

CA 1315029

Abstract RCA 84,738 Integrated latch circuitry for driving row or column busses of a matrix device fabricated in low mobility semiconductor material includes cross coupled transistors having variable impedance load devices. The cross coupled transistors are coupled between relatively positive and relatively negative supply potentials. The relatively negative supply potential is modulated to preset the state of the latches in order to reduce the load on input circuitry applying data to the latch. The variable impedance loads are modulated between relatively high and relatively low impedances to enhance the speed at which the latches change state.

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