Integrated programmable logic arrangement

Details Integrated programmable logic arrangement Integrated programmable logic arrangement

G - Physics

11

C

328/130, 352/82.

G11C 8/02 (2006.01) G11C 11/40 (2006.01) H03K 19/003 (2006.01) H03K 19/177 (2006.01)

Patent

CA 1073979

ABSTRACT OF THE DISCLOSURE An integrated programmable logic arrangement is provided into which a logic pattern can be electronically written, and out of which a logic pattern can be electronically read-out. The logic arrangement has and AND- matrix, and OR-matrix, switching transistors in the AND and OR matrices com- prosing MI1I2S (metal-insulation 1-insulation 2-semiconductor) storage type transistors, and decoder means connected to the AND and OR matrices.

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