Integrated scrambler-encoder using pn sequence generator

Details Integrated scrambler-encoder using pn sequence generator Integrated scrambler-encoder using pn sequence generator

H - Electricity

04

K

340/70

H04K 1/00 (2006.01) H04L 25/03 (2006.01)

Patent

CA 1220259

ABSTRACT OF THE DISCLOSURE Simplified method and apparatus for performing integrated scrambling and encoding or descrambling and decoding of block code digital transmissions is disclosed. The method involves setting the scrambling length equal to an integer multiple of the block length, and then implementing a pseudorandom number sequence generator within the block length counter. The output of the pseudorandom number sequence generator is then logically combined with the incoming data to provide scrambled data, simplifying the complexity of the encoder or decoder significantly.

427834

Affiliated with

Also associated with

Rating

Integrated scrambler-encoder using pn sequence generator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated scrambler-encoder using pn sequence generator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated scrambler-encoder using pn sequence generator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1312925