H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/144
H01L 21/22 (2006.01) H01L 21/70 (2006.01) H01L 21/762 (2006.01) H01L 27/00 (2006.01)
Patent
CA 1055619
ABSTRACT OF THE DISCLOSURE In the so-called iso-planar technique for producing integrated circuits, the methods of doping conventionally employed for the substrate material, result in inversion layers being formed beneath the oxide of the isolating zones which render the isolation between the individual regions of the epitaxial layer incomplete due to channel formation. Although this effect can be counteracted by increasing the doping of the substrate, this in turn increases the base capacitance of the regions. The present invention avoids this disadvantage. According to the invention, there is provided an integrated semiconductor circuit comprising a semiconductor substrate of one conductivity type and an epitaxial layer thereon of the other conductivity type. Functional elements of the circuit are arranged in isolated regions of the epitaxial layer bounded by a p-n Junction between the epitaxial layer and the substrate and by oxide walls extending through the epitaxial layer from the surface thereof to the substrate At least one of the oxide walls is bounded by a zone of the region of said one conductivity type. Conveniently, the zones which surround the isolating oxide walls may serve as resistance elements in the integrated circuit.
246721
Murrmann Helmuth
Rathbone Ronald
Schwabe Ulrich
LandOfFree
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