Integrated test and assembly device

Details Integrated test and assembly device Integrated test and assembly device

H - Electricity

05

K

356/134

H05K 3/00 (2006.01) G01R 31/28 (2006.01) H01L 21/48 (2006.01) H01L 21/60 (2006.01) H01L 21/66 (2006.01) H01L 23/14 (2006.01) H01L 23/498 (2006.01) H05K 13/00 (2006.01)

Patent

CA 1068829

INTEGRATED TEST AND ASSEMBLY DEVICE Abstract of the Disclosure A semiconductor integrated circuit device of the beam lead type having a semiconductor interconnection substrate with apertures for integrated circuit chips therein and with metal- lization patterns having sharply pointed ends for penetrating oxide layers over the bonding pads of the chips and for making electrical connection thereto. Devices thus produced may be assembled and tested and failed chips replaced as necessary before the chips are ultrasonically welded to the interconnection metallization and before final fabrication of the device. The invention also includes a method for producing an interconnection substrate in which a plurality of conically shaped holes are etched into a semiconductor wafer having sharp points within the body of the wafer. A metal layer is deposited over the surface of the semiconductor wafer filling the etched holes. Sharp points are thus formed on the metal in the etched holes. Apertures are then etched in the semiconductor wafer and the metal layer etched as required to provide sharply pointed con- necting probes suspended above apertures in the semiconductor wafer.

252049

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