H - Electricity – 04 – L
Patent
H - Electricity
04
L
H04L 7/00 (2006.01) H04J 3/06 (2006.01)
Patent
CA 2056046
A transmission line interface circuit receiving a plurality of channels of data and a plurality of receiving clock signals respectively synchronized with the plurality of channels of data received from the respective transmission lines, allowing outputs of the plurality of channels of data synchronized with a master clock signal which is supplied from outside of the transmission line interface circuit, receiving a plurality of channels of data synchronized with the master clock signal, and outputting a plurality of transmitting clock signals and the plurality of channels of data respectively synchronized with the plurality of transmitting clock signals, contains: a plurality of first synchronization timing changing circuits for receiving the plurality of channels of data synchronized with the respective receiving clock signals, and making each bit of the respective channels of data synchronized with one of the receiving clock signals; and a plurality of second synchronization timing changing circuits for receiving the plurality of channels of data synchronized with the above one of the plurality of receiving clock signals, and synchronizing each bit of the plurality of channels of data with the corresponding receiving clock signals, respectively.
Fujitsu Limited
Mcfadden Fincham
LandOfFree
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