Interleaving/deinterleaving device and method for...

H - Electricity – 03 – M

Patent

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H03M 13/27 (2006.01)

Patent

CA 2445715

A device for sequentially storing input bit symbols of a given interleaver size N in a memory at an address from 0 to N-1 and reading the stored bit symbols from the memory. The device comprises a look-up table for providing a first variable m and a second variable J satisfying the equation N=2m×J; and an address generator for generating a read address depending on the first and second variables m and J provided from the look-up table. The read address is determined by 2m(K mod J)+ BRO m(K/J), where K(0<=K<=(N-1)) denotes a reading sequence, BRO m(y) is the bit-reversed m-bit value of y and / is a function in which a quotient of K divided by J is obtained, the quotient being an integer.

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