Intermetallic barrier region for gold conductor contacts

H - Electricity – 01 – L

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356/134, 356/153

H01L 29/40 (2006.01) H01L 23/532 (2006.01) H01L 29/47 (2006.01)

Patent

CA 1140682

Abstract In a conductor pattern for integrated circuits, the use of barrier layers of TiW and selected transition metals between gold and a silicon substrate, with the transition metal containing a supplemental barrier region or stratum of an intermetallic formed between it and the gold. Also comprehended is the use of a platinum sili- cide layer between the TiW layer and silicon for Schottky Barrier Diodes.

356143

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