H - Electricity – 04 – B
Patent
H - Electricity
04
B
354/98
H04B 14/04 (2006.01) H03M 1/00 (2006.01)
Patent
CA 1129104
INTERPOLATIVE PCM DECODER Abstract An interpolative PCM decoder has a register which stores a polarity bit signal, segment selection bit signals and uniform quantization bit signals for one sampling period. A binary rate multiplier receives the uniform quantization bit signals from the register. An output signal of the binary rate multiplier and the segment selection bit signals are added. A digital-to-analog converter consisting of a ladder circuit and a group of driving switches for the ladder circuit generates an analog value of the lower end of each segment, and a logic circuit for the µ-law, into which the output of the addition is entered, generates a selection signal for the group of driving switches. The improvement consists of an AND circuit which takes a logical product between the selection signal for selecting the minimum unit of the analog value of the lower end of the segment and a control signal for changing-over between the µ-law and the A-law. The output of the AND circuit generates the same analog value as the minimum unit of the above-mentioned analog value. As a result the interpolative PCM decoder can also be used for the A-law without need for hardware duplication.
319185
Inoue Hirofumi
Kosugi Hiroshi
Shirasu Hirotoshi
Hitachi Ltd.
Kirby Eades Gale Baker
LandOfFree
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