Interrogator for electronic identification system

Details Interrogator for electronic identification system Interrogator for electronic identification system

H - Electricity

03

K

H03K 19/20 (2006.01) G01R 25/00 (2006.01) G01S 13/75 (2006.01) G01S 13/78 (2006.01) G06K 7/00 (2006.01) G06K 7/08 (2006.01) H03D 13/00 (2006.01) H03H 17/02 (2006.01) H03K 19/00 (2006.01)

Patent

CA 2219229

An interrogator (10) for use with a passive transponder (12) has a Colpitts oscillator (30, 32, 34, 36, 38) arranged to vary in frequency in accordance with the frequency of a signal from the transponder; a voltage controlled oscillator VCO 42 arranged to vary in frequency in accordance with the Colpitts frequency after a delay of a number of signal cycles, the delay being provided by a loop filter in a phase discriminator (40); and a digital filter (48) arranged to detect the phase difference between the Colpitts oscillator and the VCO. Preferably the digital filter has an input (46) comprising an array of flipflop circuits (52, 54, 56); a delay line (53, 55, 57) associated with each flipflop and providing a time delay which increases along the array, so that when first and second clock signals are provided to each flipflop- delay line pair, if the phase difference between the clock signals is less than the time delay of that delay line the flipflop provides a logical 0 and if the phase difference is greater than the time delay the flipflop provides a logical 1.

L'invention porte sur un interrogateur (10) pour transpondeur passif (12) comportant un oscillateur Colpitts (30, 32, 34, 36, 38) dont la fréquence varie en fonction de celle du signal émis par le transpondeur; un oscillateur commandé en tension VCO (42) dont la fréquence varie en fonction de celle de l'oscillateur Colpitts après un retard de plusieurs cycles du signal, le retard étant établi par le filtre à boucle d'un discriminateur de phase (40); et un filtre numérique (48) servant à détecter la différence de phase entre l'oscillateur Colpitts et l'oscillateur VCO. Ledit filtre numérique comporte de préférence une entrée (46) comportant un réseau de circuits flipflop (52, 54, 56); une ligne à retard (53, 55, 57) associée à chacun des flipflop et établissant un retard progressant en parcourant le réseau de manière à ce que lorsque les premier et second signaux d'horloge sont transmis à chacune des lignes à retard de chacune des paires de flipflop, ce dernier émette un zéro logique si la différence de phase entre les signaux d'horloge est inférieure au retard de la ligne à retard correspondante, et émette un 1 logique si la différence de phase est supérieure au retard de la ligne à retard correspondante.

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