Junction field-effect transistor

H - Electricity – 01 – L

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H01L 29/808 (2006.01)

Patent

CA 2547692

A junction field-effect transistor (20) comprises an n-type semiconductor layer (1) having a channel region, a buffer layer (3) formed on the channel region and a p+ region (4a, 4b) formed on the buffer layer (3). The concentration of electrons in the buffer layer (3) is lower than the concentration of electrons in the semiconductor layer (1). The concentration of electrons in the buffer layer (3) is preferably not more than one tenth of the concentration of electrons in the semiconductor layer (1). Thus, the threshold voltage can be easily controlled, and saturation current density of a channel can be easily controlled.

Selon la présente invention, un transistor à effet de champ à jonctions (20) comprend une couche semi-conductrice de type n (1) comportant une région de canal, une couche tampon (3) formée sur la région de canal et des régions p<SUP>+</SUP> (4a, 4b) formées sur la couche tampon (3). La concentration en électrons du tampon (3) est inférieure à celle de la couche semi-conductrice (1). La concentration en électrons de la couche tampon (3) représente de préférence un dixième ou moins de la concentration en électrons de la couche semi-conductrice (1). De cette manière, la tension de seuil et la densité de courant du canal peuvent être facilement commandées.

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