Large-scale integrated circuit and method for testing a...

Details Large-scale integrated circuit and method for testing a... Large-scale integrated circuit and method for testing a...

G - Physics

01

R

G01R 31/28 (2006.01) G01R 31/3185 (2006.01) G06F 13/22 (2006.01)

Patent

CA 2253968

In a large-scale integrated circuit, a scan path is divided between an I/0 scan path that is formed by a series connection between only flip-flops that are in a region near an I/0 pin and an internal scan path that is formed by a series connection between other flip-flops. A selector has one of its inputs connected to another end of the I/0 scan path and to one end of the internal scan path, another of its inputs connected to another end of the internal scan path, and its output connected to a scan out. This selector, based on a test mode signal, selects either all scan paths or only the I/0 scan path.

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