H - Electricity – 01 – L
Patent
H - Electricity
01
L
328/200, 356/25,
H01L 27/04 (2006.01) G05F 3/20 (2006.01) H01L 27/092 (2006.01)
Patent
CA 1275456
ABSTRACT OF THE DISCLOSURE A latch-up protection circuit for an integrated circuit using complementary MOS circuit technology has a substrate bias generator that applies a negative substrate bias to a semiconductor substrate having a p-conductive material into which a well-shaped semiconductor zone of n-conductive material is inserted. In order to avoid latch-up effects in the integrated circuit, an electronic protection circuit interrupts the capacitive charging currents of a capacitor in the well-shaped zone depending on the potential of the semiconductor substrate which is taken at a doped substrate bias terminal. The electronic protection circuit disconnects a capacitor bias generator from the capacitor when a voltage on the substrate bias terminal is greater than a difference between a reference potential and a threshold voltage of a first transistor in the electronic protection circuit. The electronic protection circuit connects the capacitive bias generator to the capacitor when a voltage on the substrate bias terminal is lower than the difference. A flow forward current flows through the electronic protection circuit during operation of the integrated circuit.
547733
Pribyl Wolfgang
Reczek Werner
Winnerl Josef
Aktiengesellschaft Siemens
Fetherstonhaugh & Co.
LandOfFree
Latch-up protection circuit fo integrated circuits using... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Latch-up protection circuit fo integrated circuits using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Latch-up protection circuit fo integrated circuits using... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1251249