Layout for radio frequency power transistors

H - Electricity – 01 – L

Patent

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Details

H01L 23/66 (2006.01) H01L 23/482 (2006.01) H01L 29/417 (2006.01) H01L 29/72 (2006.01)

Patent

CA 2174219

A layout is provided for RF power transistors that reduces common lead inductance and its associated performance penalties. An RF transistor cell is rotated 90° with respect to a conventional RF transistor cell so as to locate bond pads nearer the edge of a silicon die, reducing bond wire length and common lead inductance and thereby improving performance at high frequencies. The placement of bond pad and distribution of different parts of the transistor layout further reduces common lead inductance.

Cette implantation, destinée à des transistors de puissance à radiofréquence, permet de réduire l'inductance des conducteurs communs ainsi que les inconvénients de fonctionnement associés à ceux-ci. Une cellule de transistor à radiofréquences est tournée de 90~ par rapport à une même cellule classique de manière à ce que les plots de connexion soient placés plus près du bord d'une puce de silicium, ce qui réduit la longueur de fil de liaison ainsi que l'inductance des conducteurs communs, et améliore de ce fait le fonctionnement des transistors à hautes fréquences. Le placement des plots de connexion ainsi que la répartition des différents éléments de cette implantation de transistor permettent de réduire l'inductance des conducteurs communs.

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