Limit cycling regulator apparatus for plural parallel power...

H - Electricity – 02 – J

Patent

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323/1

H02J 3/06 (2006.01) G05F 1/62 (2006.01)

Patent

CA 1101059

ABSTRACT OF THE DISCLOSURE The present invention concerns a shunt or series regulating apparatus for controlling the current supplied to a bus line from a plurality of power sources. The apparatus comprises error detectors, dump switches; comparators with positive feedback and capacitor. The error detectors compare the bus voltage to a reference voltage and produce an error signal representing the deviation between these two voltages. The dump switches are each connected in parallel with a respective power source, and each is responsive to a control signal for switching from a OFF state to a ON state thereby to shunt the current delivered by the power source to the bus line. The comparators are associated to a respective power source and each comparator has a first input connected to the output from the error detector, a second input connected to a respective reference voltage level, and an output connected to the control input of a respective of the dump switches for applying a control signal thereto which is proportional to the difference between the error signal and the reference voltage level. The positive feedback circuits are each connected between the output of the respective power source and the second input of the corresponding comparator for superimposing a signal to the reference voltage level, thereby to set two operation thresholds for the comparator, such that each dump switch is allowed to switch cyclically between its two states, thereby to allow the current from the corresponding power source to be fed into the bus line when the dump switch is OFF and to short the power source when the dump switch is ON. The capacitor is connected between the bus line and the ground in order that its charge follows at any time the variation of the total current drawn from the plurality of power sources into the bus line such that one switch at a time is caused to switch cyclically between its two states and such that the switches are caused to switch cyclically one after another as the value of the error signal is increasing.

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