Limiter with dynamic hysteresis

H - Electricity – 03 – K

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354/146, 328/167

H03K 5/08 (2006.01) H03K 5/153 (2006.01)

Patent

CA 1183271

Abstract The invention is a limiter circuit with dynamic hysteresis for providing improved distortion immunity at the circuit output in response to an input signal. The limiter circuit includes a positive and negative peak detector. Two weighted averages are taken of the positive and negative peaks, preferrably by means of a voltage divider network. The first input to a comparator circuit receives the input signal to the limiter circuit. Different voltages from the voltage divider network are applied to the second input of the comparator circuit so as to create a dynamic hysteresis effect in the comparator circuit. The different voltages are chosen in response to the output voltage from the comparator circuit by means of an analog switch. The comparator circuit includes a fixed hysteresis voltage for stabilizing the limiter circuit at low level voltage input signals.

430917

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