H - Electricity – 03 – F
Patent
H - Electricity
03
F
H03F 3/00 (2006.01) H03F 3/68 (2006.01) H04B 10/17 (2006.01)
Patent
CA 2386851
A parallel-summation logarithmic amplifier is described that uses a novel topology of cascaded and parallel amplifiers to achieve extremely high bandwidth. Included in the topology is a unique delay matching scheme for logarithmic amplifiers that is amenable to fabrication in integrated circuit form. The result is flat group delay over broad frequency ranges and different power levels. The resulting log amplifier is suitable for radar applications and for use in high data rate fiber-optic networks. Also described is a unique design process that yields a set of amplifier gains that closely approximate a logarithm. Also described is the novel idea of using a parallel feedback amplifier (PFA) in piecewise-approximate logarithmic amplifiers. This innovation allows for the design of broadband amplifiers with significantly different gains and similar phase characteristics, which is extremely useful when designing high- frequency logarithmic amplifiers.
Davies Robert J.
Haslett James W.
Holdenried Chris D.
Mcrory John G.
Telecommunications Research Laboratories
Thompson Lambert Llp
LandOfFree
Logarithmic amplifier does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Logarithmic amplifier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Logarithmic amplifier will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1442146