Logic adder circuit

G - Physics – 06 – F

Patent

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354/207

G06F 7/50 (2006.01)

Patent

CA 1229172

ABSTRACT: Logic adder circuit. A logic circuit incorporating carry look-ahead in which substantial savings can be achieved as regards the hardware for generating the sum signals and carry signals by a suitable choice of the adder gate, i.e. by utilizing the already present signal Image which is also used for generating the carry look-ahead signal.

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