Logic analyzer for a multiplexed digital bus

Details Logic analyzer for a multiplexed digital bus Logic analyzer for a multiplexed digital bus

G - Physics

06

F

354/46

G06F 13/00 (2006.01) G01R 31/28 (2006.01) G06F 11/25 (2006.01) G11C 7/00 (2006.01) H04L 5/22 (2006.01)

Patent

CA 1172361

-9- Abstract A logic analzyer for measuring individually a plurality of logic signals transrnitted via a multiplex- ed digital bus in a time-sharing manner is disclosed. first and second memory circuits store respectively first and second logic signals of the multiplexed digital bus in accordance with first and second strobe signals synchronized with the first and second logic signals.

402026

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