Logic-circuit layout for large-scale integrated circuits

Details Logic-circuit layout for large-scale integrated circuits Logic-circuit layout for large-scale integrated circuits

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H01L 27/00 (2006.01) H01L 23/485 (2006.01) H01L 23/528 (2006.01) H01L 27/02 (2006.01) H01L 27/118 (2006.01)

Patent

CA 1243424

LOGIC-CIRCUIT LAYOUT FOR LARGE-SCALE INTEGRATED CIRCUITS Abstract of the Disclosure A VLSI chip has multiple annular rings of circuit cells, interspersed with annular wiring channels for interconnecting the cells. Another wiring layer runs perpendicular to the rings. A central chip area contains all the I/O connections for the chip.

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