Look aside array invalidation mechanism

Details Look aside array invalidation mechanism Look aside array invalidation mechanism

G - Physics

06

F

354/239

G06F 13/00 (2006.01) G06F 12/10 (2006.01)

Patent

CA 1075824

LOOK ASIDE ARRAY INVALIDATION MECHANISM ABSTRACT This specification describes a virtual memory system in which a set of conversion tables is used to translate an arbitrarily assigned programming designa- tion called a virtual address into an actual main memory location called a real address. To avoid the necessity of translating the same addresses over and over again, a table called the Directory Look Aside Table (DLAT) retains current virtual to real address translations for use where particular virtual addres- ses are requested more than once. A counter is associated the DLAT. Each time a translation is stored in the DLAT the present count in the counter is stored along side the translation. Each time the DLAT is invalidated the counter is stepped so that with each invalidation a new number is stored in the DLAT with the next translation. When a translation is read out of the DLAT the number stored with the translation is compared with the present number in the counter. If they do not match a No Compare signal is provided. If they match the translation in the DLAT is read out and fed into the directory.

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