Low leakage cmos d/a converter

H - Electricity – 03 – M

Patent

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354/101

H03M 1/66 (2006.01) H03M 1/00 (2006.01)

Patent

CA 1214282

ABSTRACT OF THE DISCLOSURE A CMOS DAC with means to avoid leakage current. In one embodiment, the back gates of the CMOS switches are held at -200mV with respect to the output lines, and the logic low level to the off switch also is set at -200mV relative to the output lines. In another embodiment, the CMOS switches are ion-implanted. In a still further embodiment, the output lines are held at a potential 200mV more positive than the P- well of the CMOS switches.

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