Low-power-dissipation cmos circuits

Details Low-power-dissipation cmos circuits Low-power-dissipation cmos circuits

H - Electricity

03

K

H03K 19/0948 (2006.01) H03K 19/00 (2006.01)

Patent

CA 2146274

A conventional CMOS inverter circuit is operated in a low-power-dissipation mode by being connected to a pulsed power supply. The circuit is utilized as a basic building block to realize a variety of logic and memory functions.

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